General Bi-Tri Logic SPWM for Current Source Converter With Optimized Zero-State Replacement

This article proposes an optimized zero-state replacement (ZSR) method for general bi-tri logic SPWM (BTSPWM) to deal with the common-mode voltage (CMV) issue. The BTSPWM can transform the well-developed modulation strategies for voltage source converters (VSCs) into current source converter (CSC) system through the logic translation, which can utilize the analysis concepts developed for VSC. With BTSPWM, all-off gating signals can be generated through the logic translation, which should be replaced with the redundant zero-states to avoid open-circuit, which provides the flexibility for ZSR. Existing ZSR strategies are mainly focused on switching time minimization while the CMV excited by the replaced zero-states is not considering. To address the CMV issue, optimized ZSR methods for general BTSPWM are proposed to address the CMV while not influence the regular PWM features. With the proposed methods, both the CMV peak value and the third-order component can be effectively reduced. Moreover, the proposed method can be easily applied to a parallel CSC system due to the inherent modularity. The performances of the proposed methods have been experimentally verified on both single and parallel CSC systems.