Multiple errors produced by single upsets in FPGA configuration memory: a possible solution

被引：19

作者：

Reorda, MS ^{[1
]}

Sterpone, L ^{[1
]}

Violante, M ^{[1
]}

机构：

[1] Politecn Torino, Dipartimento Automat & Informat, Turin, Italy

来源：

ETS 2005:10TH IEEE EUROPEAN TEST SYMPOSIUM, PROCEEDINGS | 2005年

关键词：

D O I：

10.1109/ETS.2005.29

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The very high integration levels reached by SRAM-based Field Programmable Gate Arrays (FPGAs) lead to high occurrence rate of Single Event Upsets (SEUs) in their configuration memory, which can produce multiple errors affecting routing resources. Based on detailed analysis of this phenomenon, we devised a reliability-oriented place and route algorithm able to significantly improve the reliability of SRAM-based FPGAs with limited costs in terms of performance degradation and resource occupation. To evaluate the effectiveness of the new algorithm we performed extensive fault injection experiments.

引用

页码：136 / 141

页数：6

共 13 条

[1] Radiation test methodology for SRAM-based FPGAs by using THESIC [J].

Alderighi, M ;

Casini, F ;

D'Angelo, S ;

Faure, F ;

Mancini, M ;

Pastore, S ;

Sechi, GR ;

Velazco, R .

9TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM, PROCEEDINGS, 2003, :162-162

[2]

BELLATO M, 2004, IEEE DESIGN AUTOMATI, P188

[3]

BELLATO M, 2002, IEEE RAD EFF DAT WOR

[4] On the evaluation of SEU sensitiveness in SRAM-based FPGAs [J].

Bernardi, P ;

Reorda, MS ;

Sterpone, L ;

Violante, M .

10TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM, PROCEEDINGS, 2004, :115-120

[5]

Betz V, 1996, IEEE IC CAD, P652, DOI 10.1109/ICCAD.1996.571342

[6] Identification and classification of single-event up sets in the configuration memory of SRAM-based FPGAs [J].

Ceschia, M ;

Violante, M ;

Reorda, MS ;

Paccagnella, A ;

Bernardi, P ;

Rebaudengo, M ;

Bortolato, D ;

Bellato, M ;

Zambolin, P ;

Candelori, A .

IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2003, 50 (06) :2088-2094

[7]

EBELING C, 1995, IEEE T VLSI SYST, P473

[8]

FULLER E, 2000, IEEE NUCL SPAC RAD E

[9]

KASTENSMIDT FL, 2005, IEEE DATE

[10]

Lee C. Y., 1961, IRE Transac- tions on Electronic Computers, V10, P346, DOI 10.1109/TEC.1961.5219222

← 1 2 →