Effect of GeO2 deposition temperature in atomic layer deposition on electrical properties of Ge gate stack

被引:5
|
作者
Kanematsu, Masayuki [1 ]
Shibayama, Shigehisa [1 ,2 ]
Sakashita, Mitsuo [1 ]
Takeuchi, Wakana [1 ]
Nakatsuka, Osamu [1 ]
Zaima, Shigeaki [1 ,3 ]
机构
[1] Nagoya Univ, Grad Sch Engn, Nagoya, Aichi 4648603, Japan
[2] Japan Soc Promot Sci, Chiyoda Ku, Tokyo 1020083, Japan
[3] Nagoya Univ, Inst Mat & Syst Sustainabil, Nagoya, Aichi 4648603, Japan
关键词
DIELECTRICS; GERMANIUM; PERFORMANCE; GE(100); TRAPS; CMOS;
D O I
10.7567/JJAP.55.08PC05
中图分类号
O59 [应用物理学];
学科分类号
摘要
We investigated the effect of GeO2 deposition temperature (Tdepo) on electronic properties of Al/Al2O3/GeO2/Ge MOS capacitors. Capacitance-voltage characteristics show frequency dispersions under depletion and strong inversion conditions, which can be attributed from the interface states at the atomic layer deposition (ALD)-GeO2/Ge interface and from the defect states in the quasi-neutral region in the Ge substrate, respectively. We found that the interface state density (Dit) shows similar values and energy distributions as Tdepo decreases to 200 from 300 degrees C, while a higher Dit is observed at a Tdepo of 150 degrees C. Also, from the temperature dependence of conductance, the frequency dispersion under the strong inversion condition can be related to the minority carrier diffusion to the quasi-neutral region of the Ge substrate. The frequency dependence of conductance reveals that the undesirable increment of the bulk defect density can be suppressed by decreasing Tdepo. In this study, the bulk defect density in a MOS capacitor prepared at a Tdepo of 200 degrees C decreases one tenth compared with that at a Tdepo of 300 degrees C. The ALD of GeO2 at a low temperature of around 200 degrees C is effective for both obtaining a low Dit and preventing the undesirable introduction of bulk defect density. (C) 2016 The Japan Society of Applied Physics
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页数:5
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