Theorems for identifying undetectable faults in partial-scan circuits

被引:2
作者
Pomeranz, I [1 ]
Reddy, SM
机构
[1] Purdue Univ, Sch Elect & Comp Engn, W Lafayette, IN 47907 USA
[2] Univ Iowa, Dept Elect & Comp Engn, Iowa City, IA 52242 USA
关键词
iterative logic array; pairwise distinguishing sequences; partial scan; undetectable faults;
D O I
10.1109/TCAD.2003.814957
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
We provide a definition of undetectable faults in partial-scan circuits under a test application scheme where a test consists of primary input vectors applied at-speed between scan operations. We also provide sufficient conditions for a fault to be undetectable under this test application scheme. We present experimental results on finite-state machine benchmarks to demonstrate the effectiveness of these conditions in identifying undetectable faults.
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页码:1092 / 1097
页数:6
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