Power-efficient gate control of synchronous boost converters with high output voltage

被引：2

作者：

Woo, Y.-J.

Cho, G.-H.

机构：

[1] Korea Adv Inst Sci & Technol, Div Elect Engn, Taejon 305701, South Korea

[2] JDA Technol, Taejon 305701, South Korea

来源：

ELECTRONICS LETTERS | 2007年 / 43卷 / 03期

关键词：

D O I：

10.1049/el:20072929

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A half output voltage swing gate driving scheme is presented for high voltage single chip DC/DC converters. In the proposed scheme the energy for the PMOS gate drive is reused for the NMOS gate drive, and switching loss is reduced. A high speed and area-efficient high voltage level shifter is also realised. A prototype is implemented using a 0.5 mu m 40 V power BiCMOS process.

引用

页码：156 / 157

页数：2

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