Deadlock avoidance for wormhole based switches

被引:0
作者
Theiss, I [1 ]
Lysne, O [1 ]
机构
[1] Univ Oslo, Dept Informat, N-0316 Oslo, Norway
来源
EURO-PAR 2000 PARALLEL PROCESSING, PROCEEDINGS | 2000年 / 1900卷
关键词
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
This paper considers the architecture of switches. In particular we study how virtual cut-through and wormhole networks can be used as the switch internal interconnect. Introducing such switches into a deadlock free interconnect may give rise to new deadlocks. Previously, to reason that no deadlocks are created, the resulting system was considered globally, that is, the interconnects of the switches themselves was considered as part of the system. Using flow control across the switch will eliminate the possibility of creating new deadlocks, and further global reasoning will not be necessary.
引用
收藏
页码:890 / 899
页数:10
相关论文
共 13 条
[1]   MYRINET - A GIGABIT-PER-SECOND LOCAL-AREA-NETWORK [J].
BODEN, NJ ;
COHEN, D ;
FELDERMAN, RE ;
KULAWIK, AE ;
SEITZ, CL ;
SEIZOVIC, JN ;
SU, WK .
IEEE MICRO, 1995, 15 (01) :29-36
[2]   A STUDY OF NON-BLOCKING SWITCHING NETWORKS [J].
CLOS, C .
BELL SYSTEM TECHNICAL JOURNAL, 1953, 32 (02) :406-424
[3]  
Duato J., 1997, INTERCONNECTION NETW
[4]  
GLASS CJ, 1994, J ASS COMPUTING MACH
[5]  
HORN G, 1998, SCALABLE COHERENT IN, P13
[6]  
HORST RW, 1997, HOT INTERCONNECTS 5
[7]  
*IEEE, 1992, 15961992 IEEE
[8]  
Lysne O., 1999, Proceedings of the 1999 International Conference on Parallel Processing, P68, DOI 10.1109/ICPP.1999.797389
[9]  
Ni L. M., 1993, COMPUTER
[10]   Switches and switch interconnects [J].
Ni, LM ;
Qiao, WJ ;
Yang, MY .
PROCEEDINGS OF THE FOURTH INTERNATIONAL CONFERENCE - MASSIVELY PARALLEL PROCESSING USING OPTICAL INTERCONNECTIONS, 1997, :122-129