Automatic Fault Detection Circuit for Integrated Gate Drivers of Active-Matrix Displays
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作者:
Yu, Byung-Chang
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Kyung Hee Univ, Adv Display Res Ctr, Dept Informat Display, Seoul 02447, South KoreaKyung Hee Univ, Adv Display Res Ctr, Dept Informat Display, Seoul 02447, South Korea
Yu, Byung-Chang
[1
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Kim, Jongbin
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机构:
Kyung Hee Univ, Adv Display Res Ctr, Dept Informat Display, Seoul 02447, South KoreaKyung Hee Univ, Adv Display Res Ctr, Dept Informat Display, Seoul 02447, South Korea
Kim, Jongbin
[1
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Lee, Seung-Hyuck
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Kyung Hee Univ, Adv Display Res Ctr, Dept Informat Display, Seoul 02447, South KoreaKyung Hee Univ, Adv Display Res Ctr, Dept Informat Display, Seoul 02447, South Korea
Lee, Seung-Hyuck
[1
]
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机构:
Chung, Hoon-Ju
[2
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Lee, Seung-Woo
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机构:
Kyung Hee Univ, Adv Display Res Ctr, Dept Informat Display, Seoul 02447, South KoreaKyung Hee Univ, Adv Display Res Ctr, Dept Informat Display, Seoul 02447, South Korea
Lee, Seung-Woo
[1
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机构:
[1] Kyung Hee Univ, Adv Display Res Ctr, Dept Informat Display, Seoul 02447, South Korea
[2] Kumoh Natl Inst Technol, Sch Elect Engn, Gumi 39177, South Korea
This paper presents automatic fault detection circuit for integrated gate drivers. The proposed circuit consists of one capacitor and two TFTs per scan line. The circuit can detect three types of faults, such as line disconnection (LD), low voltage stuck (LVS), and high voltage stuck (HVS) for the gate driver due to external physical stress. Simulation results showed the proposed circuit operates well. In order to verify the circuit operation, it was fabricated with indium gallium zinc oxide thin film transistors process. The measurement results also verified that our proposed fault detection circuit could detect the types and locations of the LD and LVS of the gate driver successfully. However, we found that HVS can be detected, but further study is needed to accurately detect the position of HVS in the proposed circuit.