Analysis of Parasitic Elements of SiC Power Modules With Special Emphasis on Reliability Issues

被引:41
作者
Sadik, Diane-Perle [1 ]
Kostov, Konstantin [2 ]
Colmenares, Juan [1 ]
Giezendanner, Florian [3 ]
Ranstad, Per [3 ]
Nee, Hans-Peter [1 ]
机构
[1] KTH Royal Inst Technol, Elect Energy Convers Dept, S-10044 Stockholm, Sweden
[2] Acreo Swedish ICT, S-16440 Kista, Sweden
[3] GE Power, S-35246 Vaxjo, Sweden
关键词
Multichip modules; packaging; power MOSFETs; reliability; silicon carbide (SiC); JUNCTION TEMPERATURE; GATE DRIVER; DEVICES; MOSFET;
D O I
10.1109/JESTPE.2016.2585666
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Commercially available silicon carbide (SiC) MOSFET power modules often have a design based on existing packages previously used for silicon insulated-gate bipolar transistors. However, these packages are not optimized to take advantage of the SiC benefits, such as high switching speeds and high-temperature operation. The package of a half-bridge SiC MOSFET module has been modeled and the parasitic elements have been extracted. The model is validated through experiments. An analysis of the impact of these parasitic elements on the gate-source voltage on the chip has been performed for both low switching speeds and high switching speeds. These results reveal potential reliability issues for the gate oxide if higher switching speeds are targeted.
引用
收藏
页码:988 / 995
页数:8
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