Modular design of QCA carry flow adders and multiplier with reduced wire crossing and number of logic gates

被引:16
作者
Zhang, Yongqiang [1 ]
Lv, Hongjun [1 ]
Du, Huakun [1 ]
Huang, Cheng [1 ]
Liu, Shuai [1 ]
Xie, Guangjun [1 ]
机构
[1] Hefei Univ Technol, Sch Elect Sci & Appl Phys, Hefei 230009, Peoples R China
基金
中国国家自然科学基金;
关键词
quantum-dot cellular automata; modular design; Tile CFA; Tile CDM; DC Tile CDM; QCADesigner; DOT CELLULAR-AUTOMATA; RELIABILITY; SIMULATION;
D O I
10.1002/cta.2163
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Quantum-dot cellular automata (QCA) is an emerging technology with the rapid development of low-power high-performance digital circuits. In order to reduce the wire crossings and the number of logic gates in QCA circuits, this paper proposes a full adder named Tile full adder based on a 3x3 grid module, a Tile bit-serial adder based on the new full adder and a Diverse Clock Tile bit serial adder (DC Tile bit-serial) adder based on the new full adder and a DC multiplier network. Based on previously mentioned circuit units an improved carry flow adder (CFA) named Tile CFA and two types of carry delay multiplier (CDM) named Tile CDM and DC Tile CDM (DC Tile CDM) with different sizes are presented. All of the proposed QCA circuits are designed and simulated with QCADesigner. Simulation results show that these circuit designs not only implement the logic functions correctly but also achieve a significant performance improvement. Copyright (c) 2015 John Wiley & Sons, Ltd.
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页码:1351 / 1366
页数:16
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