A performance study of optane persistent memory: from storage data structures' perspective

In this paper, we study the performance of Intel Optane DC Persistent Memory (Optane DC PMEM) from the storage data structures' perspective. This is different from existing Optane DC benchmark studies, which focus on benchmarking either low-level memory accesses or high-level holistic system performance. Particularly, we study the performance characteristics of the low-level indexing data structures (e.g., Linkedlist, Hashtable, Skiplist, Trees), which often serve as the foundation of many storage data structures, as well as the high-level graph storage data structures (e.g., Compressed Spare Row and Blocked Adjacency List), which contains complex access patterns on Optane DC PMEM under various running modes and settings. We believe that accurately understanding the performance characteristics of low-level indexing data structures is foundational for developers to design their own high-level data storage applications. In addition, understanding how the performance of low-level data structures contributes to that of high-level data structures is also critical for developers to implement their applications. To conduct these performance evaluations, we implemented pmemids_bench, a benchmark suite that includes seven commonly used indexing data structures and two popular graph data structures implemented in four persistent modes and four parallel modes. Through extensive evaluations on real Optane DC-based platform under different workloads, we identify nine observations that cover various aspects of Optane DC programming. These observations contain some unique results on how different data structures will be affected by Optane DC, providing useful reference for developers to design their persistent applications.