Low-power linear computation using nonlinear ferroelectric tunnel junction memristors

被引:184
作者
Berdan, Radu [1 ,2 ]
Marukame, Takao [1 ]
Ota, Kensuke [3 ]
Yamaguchi, Marina [3 ]
Saitoh, Masumi [3 ]
Fujii, Shosuke [3 ]
Deguchi, Jun [2 ]
Nishi, Yoshifumi [1 ]
机构
[1] Toshiba Corp R&D Ctr, Frontier Res Lab, Kawasaki, Kanagawa, Japan
[2] Kioxia Corp, Inst Memory Technol R&D, Kawasaki, Kanagawa, Japan
[3] Kioxia Corp, Inst Memory Technol R&D, Yokaichi, Japan
关键词
CLASSIFICATION; MEMORY;
D O I
10.1038/s41928-020-0405-0
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Nonlinear ferroelectric tunnel junction memristors can be used to perform linear vector-matrix multiplication operations at ultralow currents. Analogue in-memory computing using memristors could alleviate the performance constraints imposed by digital von Neumann systems in data-intensive tasks. Conventional linear memristors typically operate at high currents, potentially limiting power efficiency and scalability in practical applications. Here, we show that nonlinear ferroelectric tunnel junction memristors can perform linear computation at ultralow currents. Using logarithmic line drivers, we demonstrate that analogue-voltage-amplitude vector-matrix multiplication (VMM) can be performed in selectorless ferroelectric tunnel junction crossbars by exploiting a device nonlinearity factor that remains constant for multiple conductive states. We also show that our ferroelectric tunnel junction crossbars have the attributes required to scale analogue VMM-intensive applications, such as neural inference engines, towards energy efficiencies above 100 tera-operations per second per watt.
引用
收藏
页码:259 / 266
页数:8
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