Enhanced Sampling Clock Offset Correction Based on Time Domain Estimation Scheme

被引：18

作者：

Ai, B. ^{[1
]}

Shen, Y. ^{[2
]}

Zhong, Z. D. ^{[1
]}

Zhang, B. H. ^{[3
]}

机构：

[1] Beijing Jiaotong Univ, State Key Lab Rail Traff Control & Safety, Beijing 100044, Peoples R China

[2] Beijing Jiaotong Univ, Sch Elect & Informat, Beijing 100044, Peoples R China

[3] Engn Coll Armed Police Force, Xian 710086, Shaanxi Prov, Peoples R China

来源：

IEEE TRANSACTIONS ON CONSUMER ELECTRONICS | 2011年 / 57卷 / 02期

基金：

北京市自然科学基金; 中国国家自然科学基金;

关键词：

Sampling clock synchronization; Orthogonal Frequency Division Multiplexing (OFDM); spectrum sensing; sampling clock adjusting model; time domain; DIGITAL MODEMS; OFDM; SYNCHRONIZATION; INTERPOLATION; ALGORITHM;

D O I：

10.1109/TCE.2011.5955210

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper is concerned with the issue of sampling clock synchronization and correction. First, we make an analysis of the cause of the sampling clock offset and its effect on the performance of communication systems. A novel time domain-based sampling clock offset estimation method is proposed with greatly decreased estimation delay time. A sampling clock adjusting model in time domain is proposed as well. Simulations and numerical analysis verify better mean square error performance of the proposed method and adjusting model in contrast to the conventional sampling clock synchronization methods. In addition, three types of methods to further improve the sampling clock offset estimation accuracy in burst packet transmission systems are simulated and analyzed with some conclusions drawn

引用

页码：696 / 704

页数：9

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