Accurate Modeling of PLL With Frequency-Adaptive Prefilter: On the Positive Feedback Effect

被引:10
作者
Lei, Jiaxing [1 ,2 ,3 ]
Quan, Xiangjun [1 ,2 ,3 ]
Feng, Shuang [1 ,2 ,3 ]
Zhao, Jianfeng [1 ,2 ,3 ]
Chen, Wu [1 ,2 ,3 ]
机构
[1] Southeast Univ, Sch Elect Engn, Nanjing 210096, Peoples R China
[2] Southeast Univ, Jiangsu Prov Key Lab Smart Grid Technol & Equipme, Nanjing 210096, Peoples R China
[3] Southeast Univ, Nanjing 210096, Peoples R China
基金
中国国家自然科学基金;
关键词
Phase locked loops; Adaptation models; Mathematical models; Standards; Analytical models; Transfer functions; Stability analysis; DSOGI; Frequency adaptive filter; Phase locked loop; Positive feedback effect; Stability;
D O I
10.1109/TPEL.2021.3124930
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Phase locked loops (PLLs) with frequency-adaptive prefilters could suppress input disturbances and thus are widely studied. However, their accurate models are absent in the literature. In particular, the impact of frequency adaption (FA) is underestimated. This letter proposes the accurate and analytical modeling method with focus on the impact of frequency adaption, by taking the PLL based on dual second-order generalized integrator (DSOGI) as an example. The proposed model can precisely describe the transient behaviors of DSOGI-PLL, especially the couplings among amplitude, phase angle, and frequency. Moreover, it reveals that the FA creates a positive feedback path, which is the essential reason for the instability phenomenon and the key factor limiting the PLL performance. Experimental results have verified the accuracy of the proposed model.
引用
收藏
页码:3747 / 3752
页数:6
相关论文
共 14 条
[1]   Linear Time-Periodic Modeling, Examination, and Performance Enhancement of Grid Synchronization Systems With DC Component Rejection/Estimation Capability [J].
Golestan, Saeed ;
Guerrero, Josep M. ;
Vasquez, Juan C. ;
Abusorrah, Abdullah M. ;
Al-Turki, Yusuf .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2021, 36 (04) :4237-4253
[2]   Three-Phase PLLs: A Review of Recent Advances [J].
Golestan, Saeed ;
Guerrero, Josep M. ;
Vasquez, Juan C. .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2017, 32 (03) :1894-1907
[3]   Moving Average Filter Based Phase-Locked Loops: Performance Analysis and Design Guidelines [J].
Golestan, Saeed ;
Ramezani, Malek ;
Guerrero, Josep M. ;
Freijedo, Francisco D. ;
Monfared, Mohammad .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2014, 29 (06) :2750-2763
[4]   Design-Oriented Study of Advanced Synchronous Reference Frame Phase-Locked Loops [J].
Golestan, Saeed ;
Monfared, Mohammad ;
Freijedo, Francisco D. .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2013, 28 (02) :765-778
[5]   An Adaptive Synchronous-Reference-Frame Phase-Locked Loop for Power Quality Improvement in a Polluted Utility Grid [J].
Gonzalez-Espin, Fran ;
Figueres, Emilio ;
Garcera, Gabriel .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2012, 59 (06) :2718-2731
[6]  
Nazib AA, 2018, INT CONF POW ELECTR, P3670, DOI 10.23919/IPEC.2018.8507364
[7]   A Simple Approach to Enhance the Performance of Complex-Coefficient Filter-Based PLL in Grid-Connected Applications [J].
Ramezani, Malek ;
Golestan, Saeed ;
Li, Shuhui ;
Guerrero, Josep M. .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2018, 65 (06) :5081-5085
[8]   Modeling and Tuning of an Improved Delayed-Signal-Cancellation PLL for Microgrid Application [J].
Rasheduzzaman, Md. ;
Kimball, Jonathan W. .
IEEE TRANSACTIONS ON ENERGY CONVERSION, 2019, 34 (02) :712-721
[9]   Three-Phase PLL for Grid-Connected Power Converters Under Both Amplitude and Phase Unbalanced Conditions [J].
Reza, Md Shamim ;
Sadeque, Fahmid ;
Hossain, Md Maruf ;
Ghias, Amer M. Y. M. ;
Agelidis, Vassilios G. .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2019, 66 (11) :8881-8891
[10]  
Tan Z., 2021, PROC INT C LEARN REP, P1