Application of reversed silicon wafer direct bonding to thin-film SOI power ICs

被引：0

作者：

Ishiyama, T

Matsumoto, S

Hiraoka, Y

Sakai, T

Yachi, T

Yamada, I

Itoh, A

Arimoto, Y

机构：

[1] NTT Corp, Integrated Informat & Energy Syst Labs, Musashino, Tokyo 180, Japan

[2] Fujitsu Labs Ltd, Atsugi, Kanagawa 24301, Japan

来源：

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS | 1998年 / 37卷 / 3B期

关键词：

SOI; power MOSFET; direct bonding; device simulation; threshold voltage; parasitic bipolar effect;

D O I：

10.1143/JJAP.37.1300

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

Reversed silicon wafer direct bonding (RSDB) has been applied to Silicon-on-insulator (SOI) power Integrated Circuits (ICs). The RSDB power metal-oxide-semiconductor field-effect transistor (MOSFET) is superior to the power MOSFET using a conventional SOI substrate. In a RSDB power MOSFET, the threshold voltage is independent of the substrate bias because its gate electrode shields the substrate bias from the channel. Moreover, the parasitic bipolar effect is suppressed. RSDB also has a higher production yield. Two-dimensional device simulation results show how to optimize the device parameters enabling us to maximize the breakdown voltage of the RSDB power MOSFET. The electrical characteristics of nMOSFETs fabricated using RSDB are the same as those of nMOSFETs fabricated using the conventional SOI substrate.

引用

页码：1300 / 1304

页数：5

共 10 条

[1] Characteristics and applications of a 0.6 mu m bipolar-CMOS-DMOS technology combining VLSI non-volatile memories [J].

Contiero, C ;

Galbiati, P ;

Palmieri, M ;

Vecchi, L .

IEDM - INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST 1996, 1996, :465-468

[2]

HORIE H, 1991, 1991 INT C SOL STAT, P165

[3] A novel high-speed quasi-SOI power MOSFET with suppressed parasitic bipolar effect fabricated by reversed silicon wafer direct bonding [J].

Matsumoto, S ;

Yachi, T ;

Horie, H ;

Arimoto, Y .

IEDM - INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST 1996, 1996, :949-951

[4] Device characteristics of a 30-V-class thin-film SOI power MOSFET [J].

Matsumoto, S ;

Kim, IJ ;

Sakai, T ;

Fukumitsu, T ;

Yachi, T .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1996, 43 (05) :746-752

[5]

Nakagawa A., 1988, PESC '88 Record. 19th Annual IEEE Power Electronics Specialists Conference (Cat. No.88CH2523-9), P1325, DOI 10.1109/PESC.1988.18278

[6]

Nakamura S, 1995, INTERNATIONAL ELECTRON DEVICES MEETING, 1995 - IEDM TECHNICAL DIGEST, P889, DOI 10.1109/IEDM.1995.499359

[7] ANALYSIS OF BURIED OXIDE LAYER FORMATION AND MECHANISM OF THREADING DISLOCATION GENERATION IN THE SUBSTOICHIOMETRIC OXYGEN DOSE REGION [J].