共 15 条
[1]
Chen K.-H., 2016, Power Management Techniques for Integrated Circuit Design: Chen/Power Management Techniques for Integrated Circuit Design
[3]
Guo J., 2013, IEEE PROC A SSCC
[6]
Lee B. S., 1999, TECHNICAL REV LOW DR, P1
[7]
Split-ground effects of electronic package on the input-level of high-speed DRAM
[J].
53RD ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2003 PROCEEDINGS,
2003,
:1440-1444
[8]
Lee J., 2003, 2 ASIAN WORKSHOP ELE
[10]
Lim J, 2014, IEEE INT SYMP ELEC, P366