Modeling of Power Supply Noise Associated with Package Parasitics in an On-Chip LDO Regulator

被引:3
作者
Joo, Junho [1 ]
Sun, Yin [1 ]
Lee, Jongjoo [2 ]
Kong, Sunkyu [2 ]
Kang, Soonku [2 ]
Song, Inmyung [2 ]
Hwang, Chulsoon [1 ]
机构
[1] Missouri Univ Sci & Technol, Missouri S&T EMC Lab, Rolla, MO 65409 USA
[2] SK Hynix Inc, Solut Design & Integrat Grp, Bundang, Gyeonggi Do, South Korea
来源
2021 JOINT IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, SIGNAL & POWER INTEGRITY, AND EMC EUROPE (EMC+SIPI AND EMC EUROPE) | 2021年
基金
美国国家科学基金会;
关键词
power supply noise; LDO regulator; Power Distribution Network (PDN) design; inductive interconnects;
D O I
10.1109/EMC/SI/PI/EMCEurope52599.2021.9559151
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, the power supply noise associated with package parasitics in an on-chip low-dropout (LDO) regulator is investigated. The on-chip LDO regulator with off-chip decoupling capacitors has power supply rail noise typically in the frequency range of few hundreds of MHz, which is related to the inductive package interconnects and the parasitic capacitance of the pass transistor. An equivalent circuit is proposed to model the power supply noise and understand the effect of inductive package interconnects. Based on the proposed equivalent circuit, the mitigation of the power supply noise from a package design perspective is discussed.
引用
收藏
页码:395 / 399
页数:5
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