A low cost RSA chip based on CRT

被引：0

作者：

Wu, M ^{[1
]}

Zeng, XY ^{[1
]}

Han, J ^{[1
]}

Ma, YX ^{[1
]}

Wu, YY ^{[1
]}

Zhang, GQ ^{[1
]}

机构：

[1] Fudan Univ, State Key Lab ASIC & Syst, Shanghai 200433, Peoples R China

来源：

PROCEEDINGS OF THE 8TH JOINT CONFERENCE ON INFORMATION SCIENCES, VOLS 1-3 | 2005年

关键词：

public-key cryptosystem; RSA; CRT; modified Montgomery algorithm; Digital Signature and Verification;

D O I：

暂无

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

In this paper, the authors present a VLSI design and ASIC implementation of a low cost RSA cryptosystem based on the modified Montgomery algorithm and the Chinese Remainder Theory (CRT), as well as a new scheduling scheme. The CRT technique improves data throughput, and the new scheduling scheme reduces hardware complexity. As a result, a 1024-bit modular exponentiation calculation can be performed in about 1.2 mega cycles, and the core size is less than 54K gates. With 40MHz system clock, a signature rate over 33kbps can be achieved. Using the SMIC 0.25um CMOS process, the clock frequency can be up to 125MHz and in sequence the signature rate to 100kbps.

引用

页码：334 / 338

页数：5

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