Variation of threshold voltage in strained Si metal-oxide-semiconductor field-effect transistors induced by non-uniform strain distribution in strained-Si channels on silicon-germanium-on-insulator substrates

被引:3
作者
Sugiyama, Naoharu [1 ]
Numata, Toshinori [1 ]
Hirashita, Norio [1 ]
Irisawa, Toshifumi [1 ]
Takagi, Shin-ichi [2 ,3 ]
机构
[1] ASET, MIRAI, Saiwai Ku, Kawasaki, Kanagawa 2128582, Japan
[2] Natl Inst Adv Ind Sci & Technol, MIRAI, Tsukuba, Ibaraki 3058569, Japan
[3] Univ Tokyo, Dept Elect Engn, Fac Engn, Bunkyo Ku, Tokyo 1138656, Japan
关键词
MOSFET; strained silicon; threshold voltage; Ge condensation; SiGe on insulator; Raman spectroscopy;
D O I
10.1143/JJAP.47.4403
中图分类号
O59 [应用物理学];
学科分类号
摘要
The variation of threshold voltage in metal-oxide-semiconductor field-effect-transistors (MOSFETs) fabricated on strained Si on SiGe-on-insulator (SGOI) substrates is evaluated. A large variation of the threshold voltage is observed for MOSFETs on SGOI formed by the conventional Ge condensation method. It is experimentally revealed that the variation of threshold voltage is attributable to the variation of strain in the Si channel layers. This variation is found to be correlated with the variation of the lattice spacing in the SGOI crystal layers, which is caused by non-uniform lattice relaxation in the SGOI layers during the condensation process. It is also found that the variation of the relaxation ratio of SGOI can be significantly suppressed by the two-step oxidation and Ge condensation method.
引用
收藏
页码:4403 / 4407
页数:5
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