Design and FPGA implementation of a new approximation for PAPR reduction

被引:5
|
作者
Louliej, Abdelhamid [1 ]
Jabrane, Younes [1 ]
Zhu, Wei-Ping [2 ]
机构
[1] Cadi Ayyad Univ, Natl Sch Appl Sci Marrakech, GECOS Lab, Marrakech, Morocco
[2] Concordia Univ, ECE Dept, DSP Lab, Montreal, PQ, Canada
关键词
OFDM; PAPR; Multilayer perceptron; Neural networks; Radial basis function; FPGA; TRANSMISSION; OFDM;
D O I
10.1016/j.aeue.2018.07.019
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
One of the main drawbacks of orthogonal frequency division multiplexing (OFDM) is its sensitivity to the peak to-average power ratio (PAPR). To address this issue, a novel and efficient scheme based on multilayer perceptron (MLP) neural networks (NN) using radial basis function is proposed and implemented on FPGA. The proposed solution offers good performance as compared to previous algorithms in iterations, much lower complexity and low error rate. For a precise and less complex implementation of radial basis function, a novel approximation of the exponential function using Taylor series is proposed, implemented on FPGA and compared with Altera intellectual property core (IP core). It is shown that, the proposed approximation offers minimal resource consumption. In particular, we note a reduction of 9% and 6% in the use of lookup tables and DSP blocs.
引用
收藏
页码:253 / 261
页数:9
相关论文
共 50 条
  • [31] A New PAPR Reduction Scheme for OFDM Systems Based on Gamma Correction
    M. Mahmudul Hasan
    Circuits, Systems, and Signal Processing, 2014, 33 : 1655 - 1668
  • [32] A New Tone Reservation Scheme for PAPR Reduction in FBMC/OQAM Systems
    Laabidi, Mounira
    Zayani, Rafik
    Bouallegue, Ridha
    2015 INTERNATIONAL WIRELESS COMMUNICATIONS & MOBILE COMPUTING CONFERENCE (IWCMC), 2015, : 862 - 867
  • [33] A New PAPR Reduction Scheme for OFDM Systems Based on Gamma Correction
    Hasan, M. Mahmudul
    CIRCUITS SYSTEMS AND SIGNAL PROCESSING, 2014, 33 (05) : 1655 - 1668
  • [34] PAPR Reduction scheme For OFDM
    Bhad, Sandeep
    Gulhane, Pankaj
    Hiwale, A. S.
    2ND INTERNATIONAL CONFERENCE ON COMPUTER, COMMUNICATION, CONTROL AND INFORMATION TECHNOLOGY (C3IT-2012), 2012, 4 : 109 - 113
  • [35] Design and FPGA Implementation of New Multidimensional Chaotic Map for Secure Communication
    Bouteghrine, Belqassim
    Tanougast, Camel
    Sadoudi, Said
    JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2021, 30 (15)
  • [36] PAPR Reduction in OFDM systems
    Pradhan, Prasanta Kumar
    Yadav, Satyendra Singh
    Patra, Sarat Kumar
    2014 ANNUAL IEEE INDIA CONFERENCE (INDICON), 2014,
  • [37] Multiplexer restructuring for FPGA implementation cost reduction
    Metzgen, P
    Nancekievill, D
    42nd Design Automation Conference, Proceedings 2005, 2005, : 421 - 426
  • [38] FPGA Implementation of pAsynch Design Paradigm
    Rudin, Yehuda
    Levi, Itamar
    Fish, Alexander
    Keren, Osnat
    2019 10TH IFIP INTERNATIONAL CONFERENCE ON NEW TECHNOLOGIES, MOBILITY AND SECURITY (NTMS), 2019,
  • [39] Design and implementation of DDS base on FPGA
    Zhang, Yong-Liang
    Xie, Yong
    Xue, Jun
    Pan, Gao-Feng
    2010 THE 3RD INTERNATIONAL CONFERENCE ON COMPUTATIONAL INTELLIGENCE AND INDUSTRIAL APPLICATION (PACIIA2010), VOL VII, 2010, : 148 - 151
  • [40] Design and implementation of DDS base on FPGA
    Zhang, Yong-Liang
    Xie, Yong
    Xue, Jun
    Pan, Gao-Feng
    2011 INTERNATIONAL CONFERENCE ON INTELLIGENT COMPUTATION AND INDUSTRIAL APPLICATION (ICIA2011), VOL II, 2011, : 147 - 150