Transactional memory: An overview

被引:32
作者
Harris, Tim
Cristal, Adrian
Unsal, Osman S.
Ayguade, Eduard
Gagliardi, Fabrizio
Smith, Burton
Valero, Mateo
机构
[1] Barcelona Supercomp Ctr, Barcelona, Spain
[2] Univ Politecn Cataluna, E-08028 Barcelona, Spain
关键词
Memory architecture; Multithreading; Parallel programming; Transactional memory;
D O I
10.1109/MM.2007.63
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Writing applications that benefit from the massive computational power of future multicore chip multiprocessors will not be an easy task for mainstream programmers accustomed to sequential algorithms rather than parallel ones. this article presents a survey of transactional memory, a mechanism that promises to enable scalable performance while freeing programmers from some of the burden of modifying their parallel code.
引用
收藏
页码:8 / 29
页数:22
相关论文
共 30 条
[1]  
Adl-Tabatabai AR, 2006, ACM SIGPLAN NOTICES, V41, P26, DOI 10.1145/1133981.1133985
[2]   Unbounded transactional memory [J].
Ananian, CS ;
Asanovic, K ;
Kuszmaul, BC ;
Leiserson, CE ;
Lie, S .
11TH INTERNATIONAL SYMPOSIUM ON HIGH-PERFORMANCE COMPUTER ARCHITECTURE, PROCEEDINGS, 2005, :316-327
[3]  
[Anonymous], FORTRESS LANGUAGE SP
[4]  
Charles P., 2005, P 20 ANN ACM SIGPLAN, P519, DOI [DOI 10.1145/1094811.1094852, DOI 10.1145/1103845.1094852]
[5]  
*CRAY INC, 2005, CHAP SPEC
[6]   Kilo-instruction processors:: Overcoming the memory wall [J].
Cristall, A ;
Santana, OJ ;
Cazorla, F ;
Galluzzi, M ;
Ramírez, T ;
Pericàs, M ;
Valero, M .
IEEE MICRO, 2005, 25 (03) :48-57
[7]  
DAMRON P, 2006, P 12 INT C ARCH SUPP, P336
[8]  
Dice D, 2006, LECT NOTES COMPUT SC, V4167, P194
[9]  
Fraser K, 2004, UCAM-CL-TR-579
[10]  
Hammond L, 2004, CONF PROC INT SYMP C, P102