Automating wave-pipelined circuit design

被引：8
作者：
Kim, WJ
Kim, YB
机构：
[1] Northeastern Univ, Dept Elect & Comp Engn, Boston, MA 02115 USA
[2] Sun Microsyst Inc, Palo Alto, CA USA
来源：
IEEE DESIGN & TEST OF COMPUTERS | 2003年 / 20卷 / 06期
关键词：
D O I：
10.1109/MDT.2003.1246164
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Wave pipelining offers faster clock rates than conventional pipelining; however, wave-pipelined circuit. design is time-consuming and requires a high level of expertise. By augmenting a commercial tool with delay-balancing scripts, this method automates the synthesis part of the process with minimal delay deviation.
引用
收藏
页码：51 / 58
页数：8
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