Characteristics of two-step crystallized polysilicon thin-film transistors with a novel structure

We propose novel polycrystalline silicon thin-film transistors (poly-Si TFTs) to reduce leakage current effectively by employing the offset region near the drain and extended gate electrodes. The active layer has been prepared by two-step-annealing, which is combination of solid phase crystallization and excimer laser annealing (ELA). In the proposed devices, we have employed novel gate insulator structure, which forms the offset region and the extended gate electrodes. According to the experimental results, the leakage current of the proposed TFTs is reduced by more than a magnitude of two orders, compared with that of conventional TFTs, while ON current remains almost the same. It is verified by means of a device simulator that the electron concentration in the offset region increases under the ON state and decreases under the OFF state due to the extended gate electrodes and offset region.