Novel dissoluble hardmask for damage-less Cu/Low-k interconnect fabrication

被引：9

作者：

Furusawa, T ^{[1
]}

Machida, S ^{[1
]}

Ryuzaki, D ^{[1
]}

Sameshima, K ^{[1
]}

Ishida, T ^{[1
]}

Ishikawa, K ^{[1
]}

Miura, N ^{[1
]}

Konishi, N ^{[1
]}

Saito, T ^{[1
]}

Yamaguchi, H ^{[1
]}

机构：

[1] Hitachi Ltd, Semicond & Integrated Circuits, Tokyo 1982512, Japan

来源：

PROCEEDINGS OF THE IEEE 2003 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE | 2003年

关键词：

D O I：

10.1109/IITC.2003.1219752

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A Cu/low-k dual-damascene process using a novel dissoluble hardmask material, AlO, is developed to suppress ashing damage to porous/nonporous low-k SiOC. In this process, ArF-resist patterns are firstly transferred to a very thin, typically 30-nm-thick, AlO hardmask layer. After removing the resist, SiOC is patterned using the hardmask. The hardmask remaining after the etching is spontaneously removed during post-etch wet-cleaning. The line-to-line capacitance of 280-nm-pitch, 4-level interconnects using this process is reduced by 10% from that using a conventional resist-mask process.

引用

页码：195 / 197

页数：3