Capacitor balance issues of the diode-clamped multilevel inverter operated in a quasi two-state mode

被引:102
|
作者
Adam, Grain P. [1 ]
Finney, Stephen J. [1 ]
Massoud, Ahmed M. [1 ]
Williams, Barry W. [1 ]
机构
[1] Univ Strathclyde, Dept Elect Engn, Glasgow G1 1XQ, Lanark, Scotland
关键词
multilevel inverter; neutral point clamped;
D O I
10.1109/TIE.2008.922607
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
A new operational mode for diode-clamped multilevel inverters termed quasi two-level operation is proposed. Such operation aims to avoid the imbalance problem of the dc-link capacitors for multilevel inverters with more than three levels and reduces the dc-link capacitance without introducing any significant voltage ripple at the dc-link nodes. The proposed operation can be generalized for any number of levels. The validity of the proposed multilevel inverter operational mode is confirmed by simulations and experiments on a prototype five-level diode-clamped inverter.
引用
收藏
页码:3088 / 3099
页数:12
相关论文
共 14 条
  • [1] A New Diode-Clamped Multilevel Inverter With Balance Voltages of DC Capacitors
    Shi, Shunji
    Wang, Xiangzhou
    Zheng, Shuhua
    Zhang, Yanxi
    Lu, Dongyuan
    IEEE TRANSACTIONS ON ENERGY CONVERSION, 2018, 33 (04) : 2220 - 2228
  • [2] Harmonic elimination in diode-clamped multilevel inverter using evolutionary algorithms
    Barkati, Said
    Baghli, Lotfi
    Berkouk, El Madjid
    Boucherit, Mohamed-Seghir
    ELECTRIC POWER SYSTEMS RESEARCH, 2008, 78 (10) : 1736 - 1746
  • [3] Optimization of Diode-Clamped Multilevel Inverter by Using Switching Losses and THD
    Reddy, Maramreddy Harsha Vardhan
    Kishor, Gudipati
    Rohit, Repalle
    INTERNATIONAL JOURNAL OF EARLY CHILDHOOD SPECIAL EDUCATION, 2022, 14 (04) : 9 - 20
  • [4] DC Link Capacitor Voltage Balancing Method for Diode-Clamped Multilevel Converters
    Amini, Jalal
    Moallem, Mehrdad
    2019 IEEE 28TH INTERNATIONAL SYMPOSIUM ON INDUSTRIAL ELECTRONICS (ISIE), 2019, : 793 - 797
  • [5] Harmonic Optimization of Diode-clamped Multilevel Inverter Using Teaching-learning-based Optimization Algorithm
    Mardaneh, Mohammad
    Golestaneh, Faranak
    IETE JOURNAL OF RESEARCH, 2013, 59 (01) : 9 - 16
  • [6] 5-Level Multiple-Pole Multilevel Diode-Clamped Inverter Scheme for Reactive Power Compensation
    Raj, Pinkymol Harikrishna
    Maswood, Ali I.
    Ooi, Gabriel H. P.
    PROCEEDINGS OF THE 2015 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2015, : 57 - 60
  • [7] Space vector based modulation scheme for reducing capacitor RMS current in three-level diode-clamped inverter
    Gopalakrishnan, K. S.
    Narayanan, G.
    ELECTRIC POWER SYSTEMS RESEARCH, 2014, 117 : 1 - 13
  • [8] Six-Level Hybrid Diode-Clamped Inverter Topology and DC-link Capacitor Voltage Balancing Control
    Kim, Min-Seok
    Pribadi, Jonathan
    Lee, Dong-Choon
    IEEE TRANSACTIONS ON POWER ELECTRONICS, 2024, 39 (06) : 7192 - 7205
  • [9] Analyzing the On-State Power Dissipation in Stepped-Output Diode-Clamped Multi-Level Inverter
    Esfandiari, Ehsan
    Bin Mariun, Norman
    Marhaban, Mohammad Hamiruce
    Zakaria, Azmi
    IEICE TRANSACTIONS ON ELECTRONICS, 2010, E93C (12): : 1670 - 1678
  • [10] Switched-Capacitor-Based Neutral-Point-Clamped Quasi-Switched Boost Multilevel Inverter
    T. Ajaykumar
    Nita R. Patne
    Arabian Journal for Science and Engineering, 2020, 45 : 1765 - 1775