System level design and analysis of a fourth-order continuous-time delta-sigma modulator using relaxed gain-band-width amplifiers

被引:4
作者
Hasanzadeh, Mohammad Reza [1 ]
Abrishamifar, Adib [2 ]
机构
[1] Iran Univ Sci & Technol, Sch Elect Engn, Tehran, Iran
[2] Iran Univ Sci & Technol, Sch Elect Engn, Microelect Lab, Tehran, Iran
关键词
CT sigma modulator; Aggressive NTF; STF Peaking; CT Loop Filter; BANDWIDTH; COMPENSATION; 80-DB; ADC;
D O I
10.1002/cta.2318
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, based on mathematical approaches and behavioral modeling of internal blocks, an algorithm of designing a continuous-time delta-sigma modulator (CT sigma M) with aggressive noise shaping is discussed. Using proposed methods, the coefficients of modulator can be calculated directly while the finite gain-band-width of amplifiers and rise/fall time of digital-to-analog convertors (DACs) in feedback path are included in the transfer function of CT loop filter. To decrease the number of amplifiers, a unique resonator is proposed. Also, an extra feedback DAC is introduced to further reduction of gain-band-width requirement of last amplifier. To verify the effectiveness of proposed methods, a fourth-order, single loop, CT sigma M that benefits proportional-integrator element for compensation of excess-loop-delay is realized in system and behavioral circuit levels. It has a 4-bit quantizer, over-sampling-ratio of 10, and out-of-band-gain of 12dB. The peaking in signal-transfer-function is alleviated using a feed-forward capacitor along with proper choosing of rest coefficients. The designed modulator has 78-dB signal-to-noise-ratio; even the non-ideal behaviors of amplifiers and DACs are involved in simulations. Independent to sampling frequency, the proposed methods can be applied to other topologies of CT sigma Ms. Copyright (c) 2017 John Wiley & Sons, Ltd.
引用
收藏
页码:1576 / 1599
页数:24
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