An RF Receiver for Intra-Band Carrier Aggregation

Carrier aggregation is an attractive approach to increasing the data rate in wireless communication. This paper describes an efficient carrier aggregation receiver architecture that employs one receive path and a single synthesizer. The block-downconversion scalable receiver translates all of the channels to the baseband and utilizes a new digital image rejection technique to reconstruct the signals. A receiver prototype realized in 45 nm CMOS technology along with an FPGA back end provides an image rejection ratio of at least 70 dB with a noise figure of 3.8 dB while consuming 15 mW.