A dynamic-logic frequency divider for 5-GHz WLAN frequency synthesizer

被引：0

作者：

Kuo, Yue-Fang ^{[1
]}

Weng, Ro-Min ^{[1
]}

机构：

[1] Natl Dong Hwa Univ Hualien, Dept Elect Engn, Hualien, Taiwan

来源：

2007 17TH INTERNATIONAL CONFERENCE RADIOELEKTRONIKA, VOLS 1 AND 2 | 2007年

关键词：

divider; dynamic-logic; dual-modulus prescaler; frequency synthesizer;

D O I：

暂无

中图分类号：

TN [电子技术、通信技术];

学科分类号：

0809 ;

摘要：

A dynamic-logic frequency divider for fully integrated CMOS frequency synthesizer is presented in this paper. The divider based on the dual-modulus prescaler and dynamic logic circuit is designed to reduce the power consumption, transistor-counts, and chip area. The simulation results show the proposed circuit achieved the operating frequency band from 5.15GHz to 5.825GHz for wireless local area network applications. Under 1.8V supply voltage, it consumes only 3.6mW and occupies a chip area of 0.285mm(2).

引用

页码：67 / +

页数：2

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