Direct bonding of low temperature heterogeneous dielectrics

被引：17

作者：

Iacovo, Serena ^{[1
]}

Peng, Lan ^{[1
]}

Phommahaxay, Alain ^{[1
]}

Inoue, Fumihiro ^{[1
]}

Verdonck, Patrick ^{[1
]}

Kim, Soon-Wook ^{[1
]}

Sleeckx, Erik ^{[1
]}

Miller, Andy ^{[1
]}

Beyer, Gerald ^{[1
]}

Beyne, Eric ^{[1
]}

机构：

[1] IMEC, Leuven, Belgium

来源：

2019 IEEE 69TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC) | 2019年

关键词：

Direct wafer to wafer bonding; Low thermal budget; Voids formation; SiCN; THERMAL SILICON; WAFER; MECHANISM;

D O I：

10.1109/ECTC.2019.00-16

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Nowadays, the direct bonding process is embedded in a BEOL manufacturing process where the maximum temperature is 4000 degrees C. For certain applications there is the need to lower such thermal budget. One of the first process steps which will be modified will be the bonding layer deposition step as well as the densification step. It is known that by lowering the deposition temperature the quality of the dielectric will be decreased as well. This change will have a direct consequence on the bonding process which relies on the quality of the dielectric. It is found that if we use a post bond anneal temperature which exceeds the densification temperature voids originate at the bonding interface. By means of FTIR studies and ERD analysis the origin of the voids is tentatively ascribed to H or H related species. These findings provide a basic understanding on how to tune the deposition condition to select a proper low temperature dielectric which will enable us to obtain a good bonding uniformity and a good bond strength for the described application.

引用

页码：2206 / 2212

页数：7

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