Extraction of parameters of high permittivity ultrathin (0.5-2.0 nm) gate dielectrics

被引：0

作者：

Kar, S ^{[1
]}

机构：

[1] Indian Inst Technol, Dept Elect Engn, Kanpur 208016, Uttar Pradesh, India

来源：

2004 INTERNATIONAL SEMICONDUCTOR CONFERENCE, VOLS 1AND 2, PROCEEDINGS | 2004年

关键词：

gate dielectrics; high permittivity; parameter extraction; MOS nano-transistors; dielectric capacitance; interface traps; quantization index;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new capacitance technique is proposed for the extraction of important parameters of MOS nano-transistors with high permittivity ultrathin (equivalent oxide thickness (EOT) = 0.5 to 2.0 nm) gate dielectrics. These parameters include the gate dielectric capacitance, the flat-band voltage, the surface potential versus bias relation, the dielectric potential, the quantization indices for the accumulation and the strong inversion layer, the doping density profile right up to the interface, and the flat-band interface charge density.

引用

页码：341 / 344

页数：4