Gate-all-around Silicon Nanowire 25-Stage CMOS Ring Oscillators with Diameter Down to 3 nm

被引：40

作者：

Bangsaruntip, S. ^{[1
]}

Majumdar, A. ^{[1
]}

Cohen, G. M. ^{[1
]}

Engelmann, S. U. ^{[1
]}

Zhang, Y. ^{[1
]}

Guillorn, M. ^{[1
]}

Gignac, L. M. ^{[1
]}

Mittal, S. ^{[1
]}

Graham, W. S. ^{[1
]}

Joseph, E. A. ^{[1
]}

Klaus, D. P. ^{[1
]}

Chang, J. ^{[1
]}

Cartier, E. A. ^{[1
]}

Sleight, J. W. ^{[1
]}

机构：

[1] IBM Corp, Thomas J Watson Res Ctr, Yorktown Hts, NY 10598 USA

来源：

2010 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | 2010年

关键词：

D O I：

10.1109/VLSIT.2010.5556136

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We demonstrate the world's first top-down CMOS ring oscillators (ROs) fabricated with gate-all-around (GAA) silicon nanowire (NW) FETs having diameters as small as 3 nm. NW capacitance shows size dependence in good agreement with that of a cylindrical capacitor. AC characterization shows enhanced self-heating below 5 nm.

引用

页码：21 / 22

页数：2