Memristor based spiking neural network accelerator architecture

被引:2
|
作者
Wu Chang-Chun [1 ]
Zhou Pu-Jun [1 ]
Wang Jun-Jie [1 ]
Li Guo [1 ]
Hu Shao-Gang [1 ]
Yu Qi [1 ]
Liu Yang [1 ]
机构
[1] Univ Elect Sci & Technol China, Sch Elect Sci & Engn, Chengdu 610054, Peoples R China
基金
中国国家自然科学基金;
关键词
spiking neural networks; resistive random access memory; processing in memory; leaky integrate and fire model; hardware inference accelerator; INTELLIGENCE;
D O I
10.7498/aps.71.20220098
中图分类号
O4 [物理学];
学科分类号
0702 ;
摘要
Spiking neural network (SNN) as the third-generation artificial neural network, has higher computational efficiency, lower resource overhead and higher biological rationality. It shows greater potential applications in audio and image processing. With the traditional method, the adder is used to add the membrane potential, which has low efficiency, high resource overhead and low level of integration. In this work, we propose a spiking neural network inference accelerator with higher integration and computational efficiency. Resistive random access memory (RRAM or memristor) is an emerging storage technology, in which resistance varies with voltage. It can be used to build a crossbar architecture to simulate matrix computing, and it has been widely used in processing in memory (PIM), neural network computing, and other fields. In this work, we design a weight storage matrix and peripheral circuit to simulate the leaky integrate and fire (LIF) neuron based on the memristor array. And we propose an SNN hardware inference accelerator, which integrates 24k neurons and 192M synapses with 0.75k memristor. We deploy a three-layer fully connected network on the accelerator and use it to execute the inference task of the MNIST dataset. The result shows that the accelerator can achieve 148.2 frames/s and 96.4% accuracy at a frequency of 50 MHz.
引用
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页数:9
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