Digital Frequency Multiplying Method for the Power System Frequency Tracking Based on FPGA

被引：1

作者：

Gao, Cuiyun ^{[1
]}

Li, Wenjing ^{[1
]}

Liu, Ming ^{[1
]}

Han, Ru ^{[1
]}

机构：

[1] Anhui Univ Architecture, Hefei 230601, Anhui, Peoples R China

来源：

MECHATRONICS AND MATERIALS PROCESSING I, PTS 1-3 | 2011年 / 328-330卷

关键词：

Frequency tracking; Digital frequency multiplying; FPGA;

D O I：

10.4028/www.scientific.net/AMR.328-330.1747

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The paper propose the digital frequency multiplying method based on frequency de-noising on FPGA, aiming at the frequency aliasing of the high frequency interference in the power system frequency tracking circuit. The basic principle and hardware realization are discussed.The performance of the system is tested using two different system clock, the experiments show that: This method can eliminate the error caused by frequency aliasing, and improve the interference immunity of the system. In addition, experiments also proved that using higher system clock can improve accuracy absolutely.

引用

页码：1747 / 1750

页数：4

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