two-level voltage source inverter;
discontinuous PWM;
DC-link capacitors;
DC-link current harmonics;
MOTOR DRIVE;
INVERTER;
STRATEGY;
D O I:
10.1541/ieejjia.8.904
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
This paper proposes a novel discontinuous pulse width modulation (DPWM) strategy to reduce the switching-frequency-order DC-link current harmonics for a two-level three-phase voltage source inverter (VSI). The proposed modulation method realizes a long lifetime of the smoothing capacitor to the motor drive system. Furthermore, the proposed strategy requires only one carrier; thus, high cost hardware such as field-programmable gate arrays are unnecessary. The DC-link current harmonics are reduced by shifting two unclamped modulating signals in every half control period. In addition, the injection of the zero sequence signal to all discontinuous modulating signals optimizes the phase of the clamped modulating signal and its clamped value according to the conditions of the output phase currents; consequently, the DC-link current harmonics are reduced even when the load power factor varies. Experiments confirm that the proposed DPWM strategy can reduce the DC-link current harmonics by a maximum of 18.3% at a modulation index of 0.705 and a load power factor of 0.819.