共 50 条
- [31] Charge-mode parallel architecture for matrix-vector multiplication PROCEEDINGS OF THE 43RD IEEE MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I-III, 2000, : 506 - 509
- [32] Modular and Lean Architecture with Elasticity for Sparse Matrix Vector Multiplication on FPGAs 2023 IEEE 31ST ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, FCCM, 2023, : 133 - 143
- [33] Efficient Sparse Matrix-Vector Multiplication on Intel PIUMA Architecture 2020 IEEE HIGH PERFORMANCE EXTREME COMPUTING CONFERENCE (HPEC), 2020,
- [34] Charge-mode parallel architecture for vector-matrix multiplication IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 2001, 48 (10): : 930 - 936
- [36] Vector-Matrix Multiplication Based on a Ternary Optical Computer HIGH PERFORMANCE COMPUTING AND APPLICATIONS, 2010, 5938 : 426 - +
- [39] NESTED CROSSBAR CONNECTION NETWORKS FOR OPTICALLY INTERCONNECTED PROCESSOR ARRAYS FOR VECTOR MATRIX MULTIPLICATION APPLIED OPTICS, 1990, 29 (08): : 1068 - 1076
- [40] The ManArray™ embedded processor architecture PROCEEDINGS OF THE 26TH EUROMICRO CONFERENCE, VOLS I AND II, 2000, : 348 - 355