Linear Active Disturbance Rejection Control for Three-Phase Voltage-Source PWM Rectifier

被引:37
作者
He, Hucheng [1 ]
Si, Tangtang [1 ]
Sun, Lei [2 ]
Liu, Botao [1 ]
Li, Zhengbao [1 ]
机构
[1] Xian Univ Sci & Technol, Sch Elect & Control Engn, Xian 710054, Peoples R China
[2] Suzhou Inovance Technol Co Ltd, Suzhou 215104, Peoples R China
关键词
Pulse width modulation; Rectifiers; Voltage control; Mathematical model; Observers; Robustness; Picture archiving and communication systems; Pulse width modulation (PWM) rectifier; linear extended state observer (LESO); linear active disturbance rejection control (LADRC); PI control; robustness;
D O I
10.1109/ACCESS.2020.2978579
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Three-phase voltage-source pulse width modulation (PWM) rectifier has been widely employed in various industrial applications. For the traditional dual-loop PI control of three-phase voltage-source PWM rectifier, the voltage loop and current loop have poor disturbance rejection performance and long response time. A linear active disturbance rejection control (LADRC) strategy is proposed for three-phase voltage-source PWM rectifier in this paper. The coupling variable and external disturbance in the model of PWM rectifier are observed and compensated by linear extended state observer (LESO) in two-phase synchronous reference frame. The LADRC outer-voltage loop controller and LADRC inner-current loop controller of PWM rectifier are designed. The proposed control strategy is compared and verified with PI control and ADRC by MATLAB/Simulink. Simulation and experimental results confirm the superiority of proposed control strategy in dynamic performance and disturbance rejection.
引用
收藏
页码:45050 / 45060
页数:11
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