High Gain and High PAE 68∼94 GHz CMOS Power Amplifier Using Miniature Zero-Degree Four-Way Current Combiner

This paper reports a wideband power amplifier (PA) for 77 GHz automobile radar and 94 GHz image radar systems in 90 nm CMOS process. The PA comprises a two-stage common-source (CS) cascaded input stage, followed by a two-way cascode gain stage using miniature zero-degree two-way divider and combiner, and a four-way CS output stage using miniature zero-degree fourway divider and combiner. At each branch's input terminal (i.e. drain terminal of the parallel CS output stage), the miniature zero-degree four-way combiner can convert the serial RL load to the optimal load impedance (corresponds to the optimal output power (P-out) and power-added efficiency (PAE)) of the output stage transistors. The PA achieves power gain of 23.9, 24.1 and 20.4 dB, respectively, at 71, 77 and 94 GHz. In addition, the PA achieves P-out of 12.3, 12.2 and 9.7 dBm, respectively, at 71, 77 and 94 GHz. The maximal PAE (PAE(max)) is 18.2%, 17.3% and 8.9%, respectively, at 71, 77 and 94 GHz.