Analytical Model for an Extended Field Plate Effect on Trench LDMOS with High-k permittivity

被引:0
作者
Hu, Xiarong [1 ]
Zhang, Bo [1 ]
Luo, Xiaorong [1 ]
Jiang, Yongheng [1 ]
Zhou, Kun [1 ]
Li, Zhaoji [1 ]
机构
[1] Univ Elect Sci & Technol China, State Key Lab Elect Thin Films & Integrated Devic, Chengdu, Sichuan, Peoples R China
来源
2013 IEEE INTERNATIONAL CONFERENCE OF ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC) | 2013年
关键词
LDMOS; Field Plate; RESURF; permittivity;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An analytical model for the extended field plate effect on trench LDMOS with high-k permittivity is presented in this paper. The RESURF criterion for the trench LDMOS with extended field plate is derived, both analytical and numerical results show the drift doping is increased with high-k dielectric layer. The analysis of the breakdown mechanism is researched, and an optimal design is achieved that the voltage supported by dielectric layer is equal to the voltage supported by the drift region. The relative dielectric coefficient of high-k materials are in the range of 4 similar to 12 when the thickness of the dielectric layer is below 600nm. The breakdown voltage is decreased for a too high permittivity of the high-k material.
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页数:2
相关论文
共 8 条
[1]   An analytical model for breakdown voltage of surface implanted SOI RESURF LDMOS [J].
Chung, SK .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2000, 47 (05) :1006-1009
[2]  
Jang JJ, 2001, IEEE MTT S INT MICR, P967, DOI 10.1109/MWSYM.2001.967053
[3]   Modeling and characterization of 80V LDMOSFET for RF communications [J].
Perugupalli, P ;
Trivedi, M ;
Shenai, K ;
Leong, SK .
PROCEEDINGS OF THE 1997 BIPOLAR/BICMOS CIRCUITS AND TECHNOLOGY MEETING, 1997, :92-95
[4]   Modeling, analysis, and design of RF LDMOS devices using harmonic-balance device simulation [J].
Rotella, F.M. ;
Ma, G. ;
Yu, Z. ;
Dutton, R.W. .
2000, IEEE, Piscataway, NJ, United States (48)
[5]  
Victory J., 1998, SISPAD, P270
[6]  
Wang Jun, 2012, P ISPSD
[7]  
Xu SZ, 2009, IMECE 2008: SAFETY ENGINEERING, RISK ANALYSIS, AND RELIABILITY METHODS, VOL 16, P145
[8]   Field Enhancement for Dielectric Layer of High-Voltage Devices on Silicon on Insulator [J].
Zhang, Bo ;
Li, Zhaoji ;
Hu, Shengdong ;
Luo, Xiaorong .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2009, 56 (10) :2327-2334