Novel Linearly Graded Nanotube Field-Effect Transistors for Improved Analog Performance and Reduced Leakage Current

被引:2
作者
Kumar, Rakesh [1 ]
Kumar, Jitendra [1 ]
机构
[1] Jawaharlal Nehru Univ, Sch Comp & Syst Sci, New Delhi, India
关键词
Linearly Graded; Nanowire; Transconductance; Analog parameter; I-ON/I-OFF; Nanotube; DOUBLE-GATE; NANOWIRE FET; DESIGN; MOSFET; MODEL;
D O I
10.1007/s12633-021-01400-0
中图分类号
O64 [物理化学(理论化学)、化学物理学];
学科分类号
070304 ; 081704 ;
摘要
In present work, a Linearly Graded (LG) work function is studied by considering the binary metal alloy A(sigma)B(1-sigma) composition for the gate electrode. A high-k gate stack LG nanotube field-effect transistor (LG-NT-FET) is investigated for improving the analog performance and reduced leakage current. The present paper introduces novelty by adding charge plasma on the drain side while doping the source side in LG-NT-FET. The proposed device has the core gate, which lays inside the channel and drain area. Both the gates, including the inner and outer gates are playing a crucial role to significantly charge the channel of LG-NT-FET. It can significantly reduce the Short Channel Effects (SCEs) also. Evaluating the electrical performance metrics such as drive currents and SCEs of LG-NT-FET reveals that the proposed device can better perform in comparison with single gate silicon-based nanotube field-effect transistors (SG-NT-FETs). The device metrics get further enhanced with the tightened electrostatic control via stacking of the core-shell gate that enabled volume inversion-phase operation. The comparison of the LG-NT-FET with single gate NTFET offered a significant reduction in leakage current (similar to 10(-15)), rise in I-ON/I(OFF )ratio (similar to 10(13)), increase in transconductance and cutoff frequency as compared to the single gate SG-NT-FET. These improvements in electrical performance metrics enable the proposed device, LG-NT-FET, as a potential device to enable CMOS scaling criteria beyond the Si-NW-FET. These improvised characteristics make LG-NT-FET a promising device in designing both digitals and analog applications for FETs.
引用
收藏
页码:6271 / 6278
页数:8
相关论文
共 31 条
[11]  
Farkhanda Ana D, 2012, IJECT, V3, P2230
[12]  
Gnani E, 2006, PROC EUR S-STATE DEV, P371
[13]   Enhanced Electrostatic Integrity of Short-Channel Junctionless Transistor With High-κ Spacers [J].
Gundapaneni, Suresh ;
Ganguly, Swaroop ;
Kottantharayil, Anil .
IEEE ELECTRON DEVICE LETTERS, 2011, 32 (10) :1325-1327
[14]   Design and analysis of high sensitivity photosensor using Cylindrical Surrounding Gate MOSFET for low power applications [J].
Jain, Aakash ;
Sharma, Sanjeev Kumar ;
Raj, Balwinder .
ENGINEERING SCIENCE AND TECHNOLOGY-AN INTERNATIONAL JOURNAL-JESTECH, 2016, 19 (04) :1864-1870
[15]   A Threshold Voltage Model of Silicon-Nanotube-Based Ultrathin Double Gate-All-Around (DGAA) MOSFETs Incorporating Quantum Confinement Effects [J].
Kumar, Arun ;
Bhushan, Shiv ;
Tiwari, Pramod Kumar .
IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2017, 16 (05) :868-875
[16]   Hetro-Dielectric (HD) Oxide-Engineered Junctionless Double Gate all around (DGAA) Nanotube Field Effect Transistor (FET) [J].
Kumar, Raj ;
Kumar, Arvind .
SILICON, 2021, 13 (07) :2177-2184
[17]   Spatial Composition Grading of Binary Metal Alloy Gate Electrode for Short-Channel SOI/SON MOSFET Application [J].
Manna, Bibhas ;
Sarkhel, Saheli ;
Islam, Nurul ;
Sarkar, S. ;
Sarkar, Subir Kumar .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2012, 59 (12) :3280-3287
[18]   FinFET Versus Gate-All-Around Nanowire FET: Performance, Scaling, and Variability [J].
Nagy, Daniel ;
Indalecio, Guillermo ;
Garcia-Loureiro, Antonio J. ;
Elmessary, Muhammad A. ;
Kalna, Karol ;
Seoane, Natalia .
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2018, 6 (01) :332-340
[19]   Nanotube Junctionless FET: Proposal, Design, and Investigation [J].
Sahay, Shubham ;
Kumar, Mamidala Jagadesh .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2017, 64 (04) :1851-1856
[20]   Diameter Dependence of Leakage Current in Nanowire Junctionless Field Effect Transistors [J].
Sahay, Shubham ;
Kumar, Mamidala Jagadesh .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2017, 64 (03) :1330-1335