VHDL Implementation of Circularly Shifted PTS Technique for PAPR Reduction in OFDM

This paper presents an efficient VHDL implementation of circularly shifted partial transmit sequence (CS-PTS) scheme for peak-to-average power ratio (PAPR) reduction in orthogonal frequency division multiplexing (OFDM) signals. It eliminates the search for optimum phase factors from a given set, which manifests improved PAPR at reduced computational complexity as compared to conventional PTS (C-PTS). The amplitude of the signal is reduced by rotating each of the partially transmitted sequence anti-clockwise by a pre-determined degree and the peak power is reduced by circularly shifting the quadrature component of the partially transmitted sequence after phase rotation. A brief description of C-PTS and CS-PTS is also presented and VHDL implementation of Circularly Shifted PTS is designed. The peak-to-average power ratio performance of the proposed method has been investigated.