A 10-GHz global clock distribution using coupled standing-wave oscillators

被引:95
作者
O'Mahony, F
Yue, CP
Horowitz, MA
Wong, SS
机构
[1] Stanford Univ, Dept Elect Engn, Stanford, CA 94305 USA
[2] Stanford Univ, Dept Comp Sci, Stanford, CA 94305 USA
[3] Stanford Univ, Integrated Circuits Lab, Dept Elect Engn, Stanford, CA 94305 USA
关键词
clock distribution; coupled oscillators; distributed oscillators; on-chip phase measurement; resonant clocking; salphasic; standing wave;
D O I
10.1109/JSSC.2003.818299
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a global clock network that incorporates standing waves and coupled oscillators to distribute a high-frequency clock signal with low skew and low jitter is described. The key design issues involved in generating standing waves on a chip are discussed, including minimizing wire loss within an available technology. A standing-wave oscillator, which is a distributed oscillator that sustains ideal standing waves on lossy wires, is introduced. A clock grid architecture comprised of coupled standing-wave oscillators and differential low-swing clock buffers is presented, along with a compact circuit model for networks of oscillators. The measured results for a prototyped standing-wave clock grid operating at 10 GHz and fabricated in a 0.18-mum 6M CMOS logic process are presented. A technique is proposed for on-chip skew measurements with subpicosecond precision.
引用
收藏
页码:1813 / 1820
页数:8
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