Dual synthesis of Petri net based application specific logic controllers with increased safety

被引:0
|
作者
Tkacz, J. [1 ]
Bukowiec, A. [1 ]
Adamski, M. [1 ]
机构
[1] Univ Zielona Gora, 9 Licealna St, PL-65417 Zielona Gora, Poland
关键词
critical safety; FPGAs; logic controllers; logic synthesis; Petri nets; verification; HARDWARE IMPLEMENTATION; FPGA; DESIGN;
D O I
10.1515/bpasts-2016-0052
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In the paper, design flow of the application specific logic controllers with increased safety by means of Petri nets is proposed. The controller architecture is based on duplicated control unit and comparison results from both units. One specification of control algorithm is used by means of Petri net for both units. The hardware duplication is obtained during dual synthesis process. This process uses two different logic synthesis methods to obtain two different hardware configurations for both control units. Additionally, the dual verification is applied to increase reliability of the control algorithm. Such design flow simplifies the process of realization of control systems with increased safety.
引用
收藏
页码:467 / 478
页数:12
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