Applying real-time interface and calculus for dynamic power management in hard real-time systems

被引:28
作者
Huang, Kai [1 ]
Santinelli, Luca [2 ]
Chen, Jian-Jia [3 ]
Thiele, Lothar [1 ]
Buttazzo, Giorgio C. [2 ]
机构
[1] ETH, Comp Engn & Networks Lab, Zurich, Switzerland
[2] Scuola Super St Anna Pisa, Real Time Syst Lab, Pisa, Italy
[3] Karlsruhe Inst Technol, Inst Proc Control & Robot, Dept Informat, Karlsruhe, Germany
关键词
Power management; Real-time event streams; Real-time calculus; Real-time interface; REDUCTION;
D O I
10.1007/s11241-011-9115-z
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Power dissipation has been an important design issue for a wide range of computer systems in the past decades. Dynamic power consumption due to signal switching activities and static power consumption due to leakage current are the two major sources of power consumption in a CMOS circuit. As CMOS technology advances towards deep sub-micron domain, static power dissipation is comparable to or even more than dynamic power dissipation. This article explores how to apply dynamic power management to reduce static power for hard real-time systems. We propose online algorithms that adaptively control the power mode of a system, procrastinating the processing of arrived events as late as possible. To cope with multiple event streams with different characteristics, we provide solutions for preemptive earliest-deadline-first and fixed-priority scheduling policies. By adopting a worstcase interval-based abstraction, our approach can not only tackle arbitrary event arrivals, e. g., with burstiness, but also guarantee hard real-time requirements with respect to both timing and backlog constraints. We also present extensive simulation results to demonstrate the effectiveness of our approaches.
引用
收藏
页码:163 / 193
页数:31
相关论文
共 38 条
[1]   Leakage power analysis and reduction for nanoscale circuits [J].
Agarwal, A ;
Mukhopadhyay, S ;
Raychowdhury, A ;
Roy, K ;
Kim, CH .
IEEE MICRO, 2006, 26 (02) :68-80
[2]  
APC (American Power Conversion), 2003, DET TOT COST OWN DAT
[3]   Optimal power-down strategies [J].
Augustine, J ;
Irani, S ;
Swamy, C .
45TH ANNUAL IEEE SYMPOSIUM ON FOUNDATIONS OF COMPUTER SCIENCE, PROCEEDINGS, 2004, :530-539
[4]   Mobile supercomputers [J].
Austin, T ;
Blaauw, D ;
Mahlke, S ;
Mudge, T ;
Chakrabarti, C ;
Wolf, W .
COMPUTER, 2004, 37 (05) :81-83
[5]   Dynamic and aggressive scheduling techniques for power-aware real-time systems [J].
Aydin, H ;
Melhem, R ;
Mossé, D ;
Mejía-Alvarez, P .
22ND IEEE REAL-TIME SYSTEMS SYMPOSIUM, PROCEEDINGS, 2001, :95-105
[6]  
Bao M, 2010, DES AUT TEST EUROPE, P21
[7]   Scheduling Unit Tasks to Minimize the Number of Idle Periods: A Polynomial Time Algorithm for Offline Dynamic Power Management [J].
Baptiste, Philippe .
PROCEEDINGS OF THE SEVENTHEENTH ANNUAL ACM-SIAM SYMPOSIUM ON DISCRETE ALGORITHMS, 2006, :364-367
[8]  
Chen J. J., 2009, P 30 IEEE REAL TIM S
[9]   Procrastination determination for periodic real-time tasks in leakage-aware dynamic voltage scaling systems [J].
Chen, Jian-Jia ;
Kuo, Tei-Wei .
IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN DIGEST OF TECHNICAL PAPERS, VOLS 1 AND 2, 2007, :289-294
[10]  
Cheng H, 2006, DES AUT TEST EUROPE, P1054