A split-based fully digital feedforward background calibration technique for timing mismatch in TIADC

被引:5
|
作者
Chen, Hongmei [1 ]
Yin, Yongsheng [1 ]
Liu, Tao [2 ]
Gan, Linhao [1 ]
Xiao, Rui [1 ]
Yan, Hui [1 ]
Deng, Honghui [1 ]
机构
[1] Hefei Univ Technol, Inst VLSI Design, Hefei 230009, Peoples R China
[2] Sci & Technol Analog Integrated Circuit Lab, Chongqing 400060, Peoples R China
关键词
Time-interleaved ADC; Split; Timing mismatch; Feedforward; TIME-INTERLEAVED ADC;
D O I
10.1016/j.vlsi.2019.11.009
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a split-based feedforward calibration technique for timing mismatch of Time-Interleaved Analog-to-Digital Converter (TI-ADC). The timing mismatch is estimated by using the difference between corresponding sample points of paired split-sub-ADCs, and compensated by a non-derivative interpolation method. Compared with traditional feedback methods with LMS iterative, the proposed feedforward calibration method can achieve much higher calibration speed and the complexity of digital post-processing is greatly relaxed without using of any dummy channel or filters. In addition, it has good calibration effects in both single-tone and multi-tone input conditions. Applied in a 1 GS/s 12-bit TIADC, the simulation result shows a convergence time of 1 x 10(4)Ts under Nyquist frequency input with 2%Ts initial timing mismatch, and the peak signal to noise and distortion ratio of TI-ADC is improved from 37.54 dB to 67.60 dB with a normalized frequency of single-tone input signal f(i)(n)/f(s) = 0.474. For a multi-tone input signal which contains 10 evenly distributed frequency points in the Nyquist frequency range, after calibration, the signal to noise and distortion improves 28.33 dB.
引用
收藏
页码:105 / 114
页数:10
相关论文
共 41 条
  • [1] Background timing mismatch calibration technique for TIADC in Nyquist frequency band
    Yin, Yongsheng
    Wan, Zhujuan
    Chen, Hongmei
    Liu, Lu
    Deng, Honghui
    Meng, Xu
    Wu, Jingsheng
    ELECTRONICS LETTERS, 2020, 56 (15) : 753 - +
  • [2] A digital-background TIADC calibration architecture and a fast calibration algorithm for timing-error mismatch
    Huang, Lu
    Lin, Beiyuan
    Zhang, Sidong
    ASICON 2007: 2007 7TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2007, : 253 - 256
  • [3] A Novel Fully Digital Feedforward Background Calibration Technique for Timing Mismatch in M-Channel Time-Interleaved ADCs
    Xiong, Wei
    Zhang, Zhenwei
    Lang, Lili
    Dong, Yemin
    ELECTRONICS, 2023, 12 (09)
  • [4] An All-Digital Timing Mismatch Calibration Algorithm Based on Reference Channel for TIADC
    Zhong, Wei
    Dong, Yemin
    Lang, Lili
    Xiong, Wei
    Sun, Lin
    Liu, Yu
    Liu, Haijing
    Zhang, Zhenwei
    ELECTRONICS, 2024, 13 (06)
  • [5] All-digital background calibration technique for timing mismatch of time-interleaved ADCs
    Chen, Hongmei
    Pan, Yunsheng
    Yin, Yongsheng
    Lin, Fujiang
    INTEGRATION-THE VLSI JOURNAL, 2017, 57 : 45 - 51
  • [6] An improved wide-range, low-complexity, fully-parallel digital background timing mismatch calibration method for dual-channel TIADC based on perfect reconstruction filter bank
    Liu, Yu
    Zhang, Zhenwei
    Xiong, Wei
    Sun, Lin
    Lang, Lili
    Wu, Xufan
    Dong, Yemin
    AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2023, 171
  • [7] A fast-convergence, tree-structured, fully-parallel digital background timing mismatch calibration method for four-channel TIADC based on perfect reconstruction filter bank
    Liu, Yu
    Zhang, Zhenwei
    Lang, Lili
    Liu, Haijing
    Wu, Xufan
    Dong, Yemin
    MICROELECTRONICS JOURNAL, 2023, 141
  • [8] Calibration of timing mismatch in TIADC based on monotonicity detecting of sampled data
    Yin, Yongsheng
    Sun, Kangkang
    Chen, Hongmei
    Wang, Xiaolei
    Liu, Lu
    Deng, Honghui
    Meng, Xu
    Li, Kun
    Wang, Zhongfeng
    IEICE ELECTRONICS EXPRESS, 2020, 17 (03)
  • [9] A Split-Based Digital Background Calibration of Pipelined Analog-to-Digital Converters by Cubic Spline Interpolation Filtering
    Ehsan Zia
    Ebrahim Farshidi
    Abdolnabi Kosarian
    Circuits, Systems, and Signal Processing, 2019, 38 : 4799 - 4816
  • [10] A Split-Based Digital Background Calibration of Pipelined Analog-to-Digital Converters by Cubic Spline Interpolation Filtering
    Zia, Ehsan
    Farshidi, Ebrahim
    Kosarian, Abdolnabi
    CIRCUITS SYSTEMS AND SIGNAL PROCESSING, 2019, 38 (10) : 4799 - 4816