An undergraduate system-on-chip (SoC) course for computer engineering students

The authors have developed a senior-level undergraduate system-on-chip (SoC) course at San Jose State University, San Jose, CA, that emphasizes SoC design methods and hardware-software codesign techniques. The course uses a "real world" design project as the teaching vehicle and implements an SoC platform to control a five-axis robotic arm using Altera's state-of-the-art Excalibur chip. The Excalibur chip contains both ARM Corporation's embedded processor and a programmable logic device (PLD) array. The course goes through a complete hardware-software codesign flow from implementing custom hardware devices on a PLD to developing an embedded algorithm in a state-of-the-art design environment for a complete SoC solution. Students learn the Quartus II design environment by examining the sample design files in Altera's EXPA1 development kit and following the step-by-step instructions toward creating a simple embedded application. After this familiarization process, students define the architectural specifications of a memory-mapped servo controller, implement it in the Excalibur's PLD array, and interface this device with the ARM processor's internal bus to control each robotic-arm servo. Functional regression tests and post-synthesis timing verification steps are applied to the servo controller following the implementation phase. Subsequently, students integrate the servo controller with the rest of the system and perform board-level functional verification tests to observe whether the robotic arm can move an object from a source to a destination point accurately. Students also develop an embedded algorithm, which translates user inputs in Cartesian coordinates into robotic arm movements in spherical coordinates during laboratory sessions.