Performance test case generation for microprocessors

被引：11

作者：

Bose, P ^{[1
]}

机构：

[1] IBM, TJ Watson Res Ctr, Yorktown Heights, NY 10598 USA

来源：

16TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS | 1998年

关键词：

D O I：

10.1109/VTEST.1998.670849

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We describe a systematic methodology for generating performance test cases for current generation microprocessors. Such test cases are used for: (a) validating the expected pipeline flow behavior and timing; and, (b) detecting and diagnosing performance bugs in the design. We cite examples of application to a real, superscalar processor in pre-and post-silicon stages of development.

引用

页码：54 / 59

页数：6