Research on a chip scale atomic clock driven GNSS/SINS deeply coupled navigation system for augmented performance

Chip scale atomic clock (CSAC) is a recently developed low-profile atomic frequency reference device. Researchers have demonstrated CSAC was able to improve the accuracy of Global navigation satellite system (GNSS) receiver positioning results. However, the work was conducted using scalar tracking loops (STL). It is meaningful to investigate CSAC augmented vector tracking loop (VTL), since the VTL has different architecture with STL. Thus, in this paper, the authors investigated a CSAC driven VTL_DI system for exploring CASC impact on VTL. Firstly, the authors explored 1) whether VTL_DI could operate without regarding clock offset and drifts as VTL_DI integration filter state variables, and 2) whether VTL_DI could provide reliable position with only three satellites in view. Secondly, side-by-side comparative field tests were conducted to evaluate performance improvement: by solution A: VTL_DI supported by CSAC and solution B: a temperature compensated crystal oscillator (TXCO) with more than four satellites and three satellites in view scenarios. It was discovered that the CSAC could enhance the position performance, even if amount of satellites were fewer than four in view. However, VTL_DI system could not guarantee its positioning accuracy without clock offset as state variable, which was different from STL_DI system.