A low-voltage divide-by-3 injection-locked frequency divider

This study proposes a new low-voltage divide-by-3 CMOS injection locked frequency divider (ILFD) fabricated in a 0.18-mu m CMOS process and describes the operation principle of the ILFD. The ILFD circuit is realized with a CMOS dynamic threshold voltage LC-tank voltage-controlled-oscillator (VCO) with two injection MOSFETs. The self-oscillating VCO is injection-locked by third-harmonic input to obtain the division order of three. Measurement results show that at the supply voltage of 0.36 V, the free-running frequency, is from 1.015 to 1.093 GHz. At the incident power of - 10 dBm, tire locking range is from the incident frequency 3.01 to 3.33 GHz. This is the lowest voltage ILFD ever reported in literatures. (C) 2008 Wiley Periodicals, Inc.