A 100 W 5.1-Channel Digital Class-D Audio Amplifier With Single-Chip Design

被引:21
|
作者
Liu, Jia-Ming [1 ]
Chien, Shih-Hsiung [1 ]
Kuo, Tai-Haur [1 ]
机构
[1] Natl Cheng Kung Univ, Dept Elect Engn, Tainan 70101, Taiwan
关键词
5.1-channel; audio amplifier; class-D amplifier; delta-sigma modulator; DSM; power stage; pulse-width modulation (PWM); SDM; SIGMA-DELTA MODULATOR;
D O I
10.1109/JSSC.2012.2188465
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 100 W, 5.1-channel, single-chip, digital-input class-D audio amplifier with a low-voltage (LV) digital circuit and high-voltage (HV) switching power stage is designed for moderate-performance and cost-effective speaker systems. The LV portion, including multi-channel audio processors, delta-sigma modulators (DSMs), and pulse-width modulation (PWM) generators, is implemented with a standard CMOS digital cell-library. A dual-loop resonator is proposed to increase the stable input range of the DSM so that the low-distortion output power of the class-D amplifier can be increased. For the HV portion, distortion caused by parasitic resistances of the power stage is analyzed to obtain a better design. A multi-phase PWM switching technique is proposed to prevent the multi-channel output stages from simultaneously switching, and thus the supply bouncing can be reduced. An over-current protection circuit with high supply noise immunity is also presented. Fabricated with 0.35/3-mu m 3.3/18-V 1P3M CMOS technology, the 5.1-channel amplifier achieves a total root-mean-square (RMS) output power of 100W, a distortion of less than 0.7%, and a power efficiency of 88% with a total chip area of 48.9 mm(2).
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页码:1344 / 1354
页数:11
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