Verification Approach Based on Emulation Technology

The paper presents a scalable architecture for fast emulation of Systems-on-Chip. It is implemented on a dedicated modular FPGA-based hardware platform. This verification ecosystem presents a new approach to improve efficiency of the verification process through hardware-based acceleration of tests. The system consists of dedicated hardware modules and third-party; easy-to-get evaluation boards to provide an affordable solution for SMEs with fast bring-up time for emulation purposes. By complying to many industry standards in the areas of communication interfaces, memory modules, and connectors, the presented platform acts as a cost-effective, desktop-size solution and can be used in early stages of hardware-assisted verification process. It provides a debug capability which enables quick identification and elimination of implementation bugs. The paper also reports on the use of the emulation environment in FPGA-in-the-Loop simulation. This solution may be applied to a broad range of applications.