Investigation on a Desirable DPD Architecture and Trapping Characteristics for GaN Power Amplifier Linearization

被引：3

作者：

Song, P. ^{[1
]}

Mokhti, Z. ^{[1
]}

Mu, Q. ^{[1
]}

机构：

[1] Wolfspeed, Morgan Hill, CA 95037 USA

来源：

2021 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM (IMS) | 2021年

关键词：

piecewise DPD; 2-level DPD; GaN power amplifiers; trapping; memory effect; GMP;

D O I：

10.1109/IMS19712.2021.9574877

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 2-level digital predistortion (DPD), a simplified version of a piecewise DPD, is designed and used to verify that a piecewise DPD is effective in linearizing typical GaN devices in industry that exhibit low power distortions due to trapping. A further investigation is taken to understand the device characteristics that are favored by a piecewise DPD by characterizing various devices.

引用

页码：531 / 533

页数：3