Design of a slew rate controlled output buffer

被引:9
作者
Garcia, F [1 ]
Coll, P [1 ]
Auvergne, D [1 ]
机构
[1] ATMEL, Rousset, France
来源
ELEVENTH ANNUAL IEEE INTERNATIONAL ASIC CONFERENCE - PROCEEDINGS | 1998年
关键词
D O I
10.1109/ASIC.1998.722821
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Due to the wide range of IC operating conditions, designing I/O drivers does not constitutes a trivial task. Output ringing due to overdrive as well as power noise due to simultaneous switching of output drivers must be avoided. A structure of output driver is proposed that uses a capacitance feedback to control the output slew, reducing the power noise. The transition time of the resulting driver is shown constant over a large range of output loading conditions. A description is given of a driver implemented in a 0.8 mu m CMOS technology.
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页码:147 / 150
页数:4
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